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Circular typedef causes infinite loop #1388

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veripoolbot opened this issue Jan 8, 2019 · 2 comments
Closed

Circular typedef causes infinite loop #1388

veripoolbot opened this issue Jan 8, 2019 · 2 comments
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area: lint Issue involves SystemVerilog lint checking resolution: fixed Closed; fixed

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@veripoolbot
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Author Name: Al Grant
Original Redmine Issue: 1388 from https://www.veripool.org

Original Assignee: Wilson Snyder (@wsnyder)


Circular typedefs cause Verilator to hang in an infinite loop:

typedef A;
typedef A A;

or

typedef A;
typedef B A;
typedef A B;

With "--debugi 9" it prints endlessly.

Probably this would only ever occur with erroneous input.

@veripoolbot
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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2019-01-12T14:34:35Z


Thanks for the report.

Fixed in git towards 4.010.

@veripoolbot
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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2019-01-28T12:32:37Z


In 4.010.

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Labels
area: lint Issue involves SystemVerilog lint checking resolution: fixed Closed; fixed
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