module example;
     typedef enum logic[1:0] { ZERO=0, ONE, TWO, THREE } enumed_t;
     enumed_t v_enumed;
     always_ff @(posedge aclk)
     begin: input_ctrl_p
         if (!aresetn) begin
             v_enumed           <= ZERO;
         end else begin
             case(v_enumed)
                 ZERO: begin
                     v_enumed    <= ONE;
                 end 
                 ONE: begin
                     v_enumed    <= TWO;
                 end
                 TWO: begin
                     v_enumed    <= THREE;
                 end
                 THREE: begin
                     THREE    <= ZERO;
                 end
             endcase
         end
     end
endmodule