Support of VHDL93 #380
Labels
effort: weeks
Expect this issue to require weeks or more of invested effort to resolve
resolution: abandoned
Closed; not enough information or otherwise never finished
type: feature-IEEE
Request to add new feature, described in IEEE 1800
type: feature-non-IEEE
Request to add new feature, outside IEEE 1800
Author Name: Sebastien Van Cauwenberghe
Original Redmine Issue: 380 from https://www.veripool.org
Original Date: 2011-03-01
Original Assignee: Sebastien Van Cauwenberghe
Work is ongoing on a separate branch
https://github.com/sebx86/VerilatorVHDL
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