Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2013-11-10T18:38:20Z

modport_import makes sense.

modport_export makes other simulators upset; I think myfunc needs to be predeclared as an extern.

Original Redmine Comment
Author Name: Jeremy Bennett (@jeremybennett)
Original Date: 2013-11-15T09:09:50Z

Hi Wilson,

My bad - I didn't test the export example properly. I've pushed an improved version, which passes with VCS. It does require the extern declaration, which by my reading of the standard should not be necessary.

Jeremy

Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2013-12-21T11:53:20Z

Modport import is fixed in git towards 3.855.

Could you confirm the usefulness of export in synthesized code? Export messes with how linking currently works, so will be a bit of a mess.

Original Redmine Comment
Author Name: Jeremy Bennett (@jeremybennett)
Original Date: 2013-12-31T19:18:12Z

Hi Wilson,

Sorry for the slow follow-up over the holiday period. Hope you had a good Christmas and best wishes for 2014.

I agree with you on this. I think import is the one that really matters. I found export didn't quite do what I expected with event driven simulation, so just modport_import should be sufficient. That's all the big SystemVerilog test case uses.

Jeremy

Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2014-01-07T01:24:06Z

Import only then. Resolved with earlier commit.

Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2014-01-18T18:29:48Z

In 3.855.